Parallel Architectures and Compilation Techniques [PACT 11] Conference.

October 10, 2011
Galveston Island, TX

Monday, October 10 -- "Hybrid-Core Computing: Extending a Commodity Instruction Set with Application Specific Logic" by Glen Edwards, Hardware Engineer; John Leidel, Software Architect

Abstract: The Convey hybrid-core platform provides an advantageous platform to build tightly integrated extensions to the base x86_64 Intel instruction set. This tutorial will provide design methodologies and sample projects utilizing the Convey Personality Development Kit reconfigurable instruction set tools in order to create application-specific logic/instruction set architectures. This tutorial shall also provide information on integrating new instruction set architectures into the Convey C/C++/Fortran compiler stack, thus providing users the ability to define new high-level instructions and inlined/vectorized intrinsics.

.: Required Skills: Knowledge of basic hardware architecture concepts; fluent in C, C++ or Fortran; knowledge of assembly language concepts; general understanding of compiler compilation processes.

Parallel Architectures and Compilation Techniques [PACT 11] Conference.

Exhibition

October 14, 2011

Friday, October 14, 2011 -- PGAS-X Workshop: PGAS & Shared Memory Extensions for Heterogeneous Architectures chaired by Stephen Poole, Oak Ridge National Lab; John Leidel, Convey Computer Corp.

Galveston Island, TX

.: Abstract: Partitioned Global Address Space [PGAS] and shared memory programming models such as UPC, Co-Array Fortran, OpenSHMEM and OpenMP offer mechanisms to expose applications to globally shared memory and native thread/task parallelism. However, with the advent of heterogeneous computing architectures, there exists a significant gap in coupling PGAS-style languages to non-traditional computing devices such as GPU’s and reconfigurable processors. This workshop shall serve as a forum to present research developments and language-extensions for tightly coupled PGAS/shared memory languages and heterogeneous architectures.